A Technique For Troubleshooting Clock Jitter Associated With Power Supply PDN Performance

Focus:

When a clock is powered by a voltage regulator, the performance of the clock depends not only on the capabilities of the regulator, but on its performance as part of the power distribution network or PDN that delivers the supply current to the clock. The clock is susceptible to jitter induced by peaks or resonances in the impedance curve at certain frequencies. In this 1 and a half minute video, Steve Sandler demonstrates how to identify those resonances in the PDN by measuring the jitter on a 10-MHz clock powered by a linear regulator. Test instruments and fixtures are identified and details on test setup are explained.

What you’ll learn:

• How to identify resonances in a power distribution network by measuring clock jitter

Notes:

The title of this video on YouTube is “VRTS2 clock jitter 1 port probe RTO.”

View the Source

Author & Publication:

Steve Sandler, Picotest, YouTube, Apr 01 2014

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