Technology Recycles Noise Currents To Reduce Power Drain Of Digital Circuits

Focus:

In systems with digital signal processing circuits, the process of bypassing the noise currents away from the supply rail ultimately creates a “throw away” dc power drain on system power sources, batteries, and capacitors. A new methodology developed by CurrentRF reduces this digital power drain without the need for costly digital design rework and as a secondary benefit, enhances the stability of the system’s power rail. This methodology has been implemented in a production-ready integrated circuit, which is then the basis for “add on” solutions to existing digital and system designs. In this article, the principles of operation behind the CC-100 Power Optimizer technology are explained at a high level and results obtained with two implementations of the technology are presented to illustrate the possible power savings. Then, the CC-100 Power Optimizer reference design and its various packaging options are discussed.

What you’ll learn:

• How to understand a methodology for reducing power consumpotion in digital circuitry by recyclying noise currents

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Author & Publication:

Michael Hopkins, CurrentRF, Discovery Bay, Calif., How2Power Today, Apr 15 2014

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