EMI For Wisdom Seekers (Part 4): Minimizing Parasitic Current Loops

Focus:

This series of EMI articles targeting power supply package designers and novice EEs continues with a discussion on parasitic loops—not only those where the switched currents actually flow but also those that result from the interaction of loops. In this article, using the buck converter as the example, the author explains which loop combinations contribute most to EMI and how minimizing their areas reduces EMI. He also shows a trick (involving added metal and cancellation loops) for minimizing the effective parasitic loop area in cases where the physical size of the components does not allow the loop area to be made smaller.

What you’ll learn:

• How to identify and minimize areas of current loops that lead to EMI generation in power converter designs
• How to cancel EMI through use of ground planes and other metallization when reduction of loop area is difficult

View the Source

Author & Publication:

Patrice Lethellier, Noizgon, Salt Lake City, Utah, How2Power Today, Feb 16 2018

This article summary appears
in the HOW2POWER Design Guide.

The Design Guide offers
organized access to
hundreds of articles
on dozens of power conversion
and power management topics.

The Design Guide search results
include exclusive summaries
and accurate "how to" analysis
to help you make faster,
more informed decisions.

Search
for more articles