The Engineer’s Guide To EMI In DC-DC Converters (Part 5): Mitigation Techniques Using Integrated FET Designs

Focus:

The circuit schematic and PCB are pivotal to achieving excellent EMI performance. Part 3 underscored the need to minimize “power loop” parasitic inductance through component selection and PCB layout. The power converter IC has an outsized impact here, in terms of its package technology and EMI-specific features. As outlined in part 2, differential-mode filtering is mandatory to reduce the input ripple current amplitude for EMI regulatory compliance. Meanwhile, common-mode filtering is generally required to curtail emissions above approx. 10 MHz and shielding also offers excellent results at high frequencies. This article delves into all these aspects, offering practical examples and guidelines (particularly with regard to PCB layout) to mitigate EMI, specifically for converter solutions with integrated power MOSFETs and controller.

What you’ll learn:

• How to design dc-dc converters for low EMI, especially where power converter ICs with integrated MOSFETs are used
• How to optimize dc-dc converter PCB designs for low EMI
• How to optimize EMI filtering in dc-dc converter designs

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Author & Publication:

Timothy Hegarty, Texas Instruments, Phoenix, Ariz., How2Power Today, Jun 15 2018

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