Matching Driver IC And FETs Bring GaN Benefits To Low-Voltage POL Converters

Focus:

Using higher switching frequencies (>1 MHz) in lower voltage (12 V to 1 V) point-of- load converters (POLs) leads to smaller inductors, less output capacitance and the potential for increased control loop bandwidth, which enables less output capacitance to meet voltage excursion requirements during fast load transients. These benefits can’t be obtained using silicon MOSFETs without sacrificing efficiency. However, due to the recent advent of low-voltage GaN FETs and matching drivers, giving up efficiency is no longer necessary. This article demonstrates the performance improvements that can be obtained when using GaN FETs in combination with GaN FET drivers in 12-V to 1-V point-of-load converters. The example design described here uses the uP1966D, a dual-channel, synchronous driver IC from uPI Semiconductor in combination with an EPC2100 GaN asymmetrical half-bridge FET from Efficient Power Conversion. The efficiency of this POL design is compared with that of a silicon-based solution. The article begins with a description of the driver and includes details of POL circuit operation and pc-board design.

What you’ll learn:

• How to obtain high efficiency at high switching frequencies in low-voltage point-of-load converters by using GaN FETs and matching drivers

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Author & Publication:

Ron Vinsant, uPI Semi Mountain View, Calif., How2Power Today, Dec 13 2019

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