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Characterizing Dynamic COSS Losses in 600-V GaN HEMTs Focus: Every time a power device is switched, its output parasitic capacitance COSS incurs a loss
because it is charged and discharged. COSS losses, then, are proportional to switching
frequency. Because GaN enables higher-frequency operation, COSS is more of a consideration
for GaN power HEMTs than silicon MOSFETs. However, COSS losses are not easy to
characterize and the industry still lacks a solid understanding of the underlying physics
mechanism. This article explores different methods for characterizing COSS losses—
nonlinear resonance, Sawyer-Tower, and calorimetric. This article presents a novel
addition to the calorimetric method that simplifies setup calibration and speeds COSS loss
characterization by eliminating the need to wait until the thermal system has reached
thermal equilibrium.
What you’ll learn: - How to speed characterization of COSS losses in GaN power transistors
- How to understand COSS loss dependency on slew-rate, displacement current, switching
frequency and drain-source on-resistance
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Author & Publication: Stefano de Filippis and Matthias J. Kasper, Infineon Technologies Austria, Villach, Austria, How2Power Today, May 15 2024
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